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LIN D O C #: 1669
LX1669
PROGRAMMABLE DC:DC CONTROLLER
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DESCRIPTION The LX1669 is a Monolithic Switching Regulator Controller IC designed to provide a low cost, high performance adjustable power supply for advanced microprocessors and other applications requiring a very fast transient response and a high degree of accuracy. It provides a programmable switching regulator output suitable for powering Pentium(R) II and other processors. Programmable Synchronous Rectifier Driver for CPU Core. The main output is adjustable from 1.3 to 3.5V using a TTL-compatible 5-bit digital code to meet Intel specifications. The IC can read the signal from a DIP-switch, hardwired to Pentium II processor's pins or from software. The 5-bit code adjusts the output voltage between 1.30 and 2.05V in 50mV increments, and between 2.0 and 3.5V in 100mV increments. The device can drive dual MOSFET's resulting in typical efficiencies of 85 - 90%, even with loads in excess of 10A. Short-circuit Current Limiting without Expensive Current Sense Resistors. The current sensing mechanism can use a PCB trace resistance or the parasitic resistance of the main inductor. For applications requiring a high degree of accuracy, a conventional sense resistor can be used. Ultra-Fast Transient Response Reduces System Cost. The fixed frequency modulated off-time architecture results in the fastest transient response for a given inductor. Small Package Size. The LX1669 is available in an economical 16-pin narrow body SOIC package.
K E Y F E AT U R E S
s 5-Bit Programmable Output For CPU Core Supply s Power Solution For Pentium II Processors s No Sense Resistor Required For Short-Circuit Current Limiting s Soft-Start And Hiccup-Mode Current Limiting Functions s Modulated Constant Off-Time Control Mechanism For Fast Transient Response And Simple System Design s Power Good Flag s Over-Voltage Pin Can Drive SCR Crowbar Or Turn Off Signal Silver-Box Power Supply s Digital-Compatible Inputs (Including VID Pins)
A P P L I C AT I O N S
s Socket 7 Processor Supplies s Pentium II Processor Supplies s Deschutes CPU & L2-Cache Memory Supplies s Voltage Regulator Modules s General Purpose And Microprocessor DC:DC Supplies
NOTE: For current data & package dimensions, visit our web site: http://www.linfinity.com.
PRODUCT HIGHLIGHT
5V
12V
L2, 1H C2
1500Fx3
C8 1F
C3 1F
1
Q1
IRL3102
L1 2.5H Q2
IRL3303
RSENSE 2.5m
CPU Core VCORE
R3 10k
TDRV VCC12 VCC5 PWRGD OVP VID0 VID1 VID2
PGND BDRV AGND SS/EN VFB VCORE VID4 VID3
16 15 14 13 12 11 10 9
2 3 4 5
LX1669
CSS
0.1F
PWRGD
6 7 8
VID4 VID3 VID2 VID1 VID0
SCR 2N6504
Q4*
C1
1500F x 6
* Q4 optional OVP crowbar
PA C K A G E O R D E R I N F O TA (C) 0 to 70
D Plastic SOIC 16-pin
LX1669CD
Note: All surface-mount packages are available in Tape & Reel, append the letter "T" to part number. (i.e. LX1669CDT)
Copyright (c) 1999 Rev. 1.0 4/99
LINFINITY MICROELECTRONICS INC.
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
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PRODUCT DATABOOK 1996/1997
LX1669
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TDRV VCC12 VCC5 PWRGD OVP VID0 VID1 VID2
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
A B S O LUT E M AXIM UM R AT IN GS
(Note 1 & 2)
12V Supply Voltage (VCC12) .................................................................................. 18V 5V Supply Voltage (VCC5) ....................................................................................... 7V Output Drive Peak Current Source (500ns) ....................................................... 1.0A Output Drive Peak Current Sink (500ns) ........................................................... 1.0A Input Voltage (SS, VID[0:4]) ................................................................... -0.3V to 6V Operating Junction Temperature .................................................................... 150C Storage Temperature Range ........................................................... -65C to +150C Lead Temperature (Soldering, 10 Seconds) .................................................... 300C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Note 2. VCC3 supply is used as input to internal low dropout regulator. Voltages above 3.3V will cause increased thermal dissipation in the package. Power dissipation should be limited to keep junction temperature below maximum rating.
PGND BDRV AGND SS/ENABLE VFB VCORE VID4 VID3
D PACKAGE (Top View)
T H E R MAL DATA
D PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA 120C/W
Junction Temperature Calculation: TJ = T A + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
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ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, 4.75V < VCC5 < 5.25V and 10.8V < VCC12 < 13.2V, 0C TA 70C. Test conditions: VCC5 = 5V, VCC12 = 12V, T = 25C.)
Parameter Reference & DAC
Initial Accuracy Cumulative Regulation Accuracy
Symbol
VCORE
Test Conditions
(Less 40mV output adaptive positioning), 1.3V VCORE 3.5V, TA = 25C
Min.
-1 -1.5
LX1669 Typ.
Max.
+1 1.5
Units
% % s kHz
1.3V V CORE 3.5V OT Freq IFB VCORE = 2.0V VCORE = 1.3V to 3.5V 1.0V < VSS = VFB < 3.5V Overdrive 5mV 0V < VFB = VCORE < 3.5V
Timing
Off Time Switching Frequency 2.4 250 -0.3 100 12 60 100 100 11 0.1 4.2 0.10 18 0.5 10 24 6 13 108 90 110 91 2 0.5 117 60 -1
Error Comparator / CSInput Bias Current EC Delay to Output A ns k mV ns ns V V V V k V % mA mA mA % % % V % mA V V
Current Sense +
Input Resistance Pulse By Pulse Current Limit Current Sense Delay To Output RCORE VCLP 45 Overdrive 5mV T RF VDH V DL VST RSS VEN DCHIC ICD IVCC12 IVCC5 CL = 3000pF ISOURCE = 20mA ISINK = 20mA VCC12 > 3.9V
Output Drivers
Drive Rise Time, Fall Time Drive High Drive Low 10
0.2 4.6
UVLO and Soft-Start (SS)
VCC5 Start-Up Threshold Hysteresis SS Resistor SS Output Enable Hiccup Duty Cycle 3.9
0.4 CSS = 0.1F, V DAC = 2.00V, FREQ = 100Hz Out Freq = 200kHz, CL = 3000pF, Synch., VSS > 0.5V VSS < 0.5V VSS < 0.5V (VCORE / VSET) VCORE rising, VOUT2 2.0V (VCORE / VSET) VCORE falling, VOUT2 2.0V IPWRGD = 4mA (VCORE / VSET), V CORE rising VOVP = 2.0V
Supply Current
VCC12 Dynamic Supply Current Static Supply Current 12V 5V Threshold Hysteresis Power Good Voltage Low Over-Voltage Threshold OVP Sourcing Current 9 18 111 92 0.7 125
Power Good / Over-Voltage Protection (OVP)
110 35
VID Pins
Low Input High Input VIL VIH Internally pulled up to VCC5 thru 30k 2.0 0.8
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ELECTRICAL CHARACTERISTICS
Table 1 - Adaptive Transient Voltage Output Processor Pins
0 = Low, 1 = High
(Output Voltage Setpoint -- Typical)
Output Voltage (VSET) VID0 0.0A
Nominal Output* (VSET)
1 1 1.34V 1.30V 1 0 1.39V 1.35V 0 1 1.44V 1.40V 0 0 1.49V 1.45V 1 1 1.54V 1.50V 1 0 1.59V 1.55V 0 1 1.64V 1.60V 0 0 1.69V 1.65V 1 1 1.74V 1.70V 1 0 1.79V 1.75V 0 1 1.84V 1.80V 0 0 1.89V 1.85V 1 1 1.94V 1.90V 1 0 1.99V 1.95V 0 1 2.04V 2.00V 0 0 2.09V 2.05V 1 1 2.04V 2.00V 1 0 2.14V 2.10V 0 1 2.24V 2.20V 0 0 2.34V 2.30V 1 1 2.44V 2.40V 1 0 2.54V 2.50V 0 1 2.64V 2.60V 0 0 2.74V 2.70V 1 1 2.84V 2.80V 1 0 2.94V 2.90V 0 1 3.04V 3.00V 0 0 3.14V 3.10V 1 1 3.24V 3.20V 1 0 3.34V 3.30V 0 1 3.44V 3.40V 0 0 3.54V 3.50V with no adaptive output voltage positioning.
VID4
VID3
VID2
VID1
0 1 1 0 1 1 0 1 1 0 1 1 0 1 0 0 1 0 0 1 0 0 1 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 1 1 0 1 1 0 1 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 0 0 1 0 0 1 0 0 * Nominal = DAC setpoint voltage
Note: Adaptive Transient Voltage Output In order to improve transient response a 40mV offset is built into the voltage comparator. At high currents, the peak output voltage will be lower than the nominal set point , as shown in Figure 4. The actual output voltage will be a function of the sense resistor, output current and output ripple.
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C H A R A C T E R I S T I C S C U RV E S
100 100
95
95
EFFICIENCY (%) __
90
90
85
EFFICIENCY (%) __
EFFICIENCY AT 3.1V EFFICIENCY AT 2.8V EFFICIENCY AT 1.8V
85
80
80
EFFICIE NCY A T 3.1V
75
75
EFFICIE NCY A T 2.8V EFFICIE NCY A T 1.8V
70 1 2 3 4 5 6 7 8 9 10 11 12 13 14
70 1 2 3 4 5 6 7 8 9 10 11 12 13 14
IOUT (A)
IOUT (A)
FIGURE 1 -- Efficiency Test Results: Non-Synchronous Operation, V IN = 5V BLOCK DIAGRAM
FIGURE 2 -- Efficiency Test Results: Synchronous Operation, VIN = 5V
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VCORE 60mV
12
VFB +12V CS Comp IRESET PWM R S Q Q
1 2
VIN (5V)
VCC12
CIN
TDRV
L
RSENSE
VCORE
40mV Error Comp
Set VRESET
15
BDRV
ESR COUT
16
PGND
PWRGD 4 OVP 5
Power Good & OVP RSS 20k Hiccup Off-Time Control UVLO UVLO
14
AGND
+5V
VREF
6 7
Hiccup
3
VCC5
DAC VSET
VID[0:4] 8
9 10
SS/ENABLE
13
CSS
FIGURE 3 -- Block Diagram
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FUNCTIONAL PIN DESCRIPTION
Pin Number
1 2 3 4 5
Pin Designator
TDRV VCC12 VCC5 PWRGD OVP
Description
Gate drive to the top FET. +12V supply for the gate drivers. If 12V is not available in the application, a bootstrap circuit is required to create the biasing voltage for the FET gate drivers. +5V supply for internal biasing and power to the IC. Open collector output, pulled down when the core voltage is not within 10% of the DAC output. Over-voltage protection: this pin is pulled to above 3V when the switcher output is above 17% of its set voltage. This pin is capable of sourcing 40mA current, and can be used to drive an SCR crowbar or as a signal to turn off the main power supply. Input pins to the DAC. The output of the DAC sets the nominal voltage of the PWM output (see Table 1). These inputs are TTL-compatible.
6 7 8 9 10 11 12
VID0 VID1 VID2 VID3 VID4 VCORE VFB
Output (CPU core) voltage, connected to the output of the regulator (after the sense resistor). This pin is also connected to the power good and the over current comparators in the IC. Dual function pin for feedback and current sensing. The peak voltage of this is set 40mV above the nominal set-point (VID) voltage. When the voltage difference between this pin and VOUT (pin 15) exceeds 60mV, the over current comparator will be tripped. The over current tripping level can be set as I = 60mV/RSENSE where R SENSE is the sensing resistance (see Application Note section). Soft-startup and hiccup capacitor pin. During startup, the voltage of this pin controls the core voltage. An internal 20k resistor and the external capacitor set the time constant for the soft-startup. Soft-start does not begin until the supply voltage exceeds the UVLO threshold. When over-current occurs, this capacitor is used for timing the hiccup. See Application Information for more detail. The PWM output can be disabled by pulling the SS/ENABLE pin below 0.5V. Analog ground. Bottom FET drive. Power ground. Ground return for FET drivers.
13
SS/ENABLE
14 15 16
AGND BDRV PGND
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T H E O R Y O F O P E R AT I O N SWITCHER OUTPUT VOLTAGE REGULATION Refer to the IC Block Diagram and the Product Highlight circuit. When the top MOSFET turns ON, the inductor current increases. The voltage at VFB pin increases due to the ESR of the output capacitor and the current-sensing resistor. When the VFB pin voltage reaches the threshold voltage of the error comparator, VSET (the DAC output set-point voltage) plus 40mV offset, the PWM latch is reset. Consequently, the top MOSFET turns OFF and the bottom (synchronous) MOSFET turns ON. The off-time control block controls the off-time of the top MOSFET. During the off-time, the inductor current and the V FB pin voltage decrease. As the off-time finishes, the synchronous MOSFET turns OFF and the top MOSFET turns ON again, repeating the previous cycle. A break-before-make circuit prevents simultaneous conduction of the two MOSFET's. The 40mV offset to the set voltage enhances the transient response of the output voltage, as shown in Figure 4 below. s The peak voltage at the VFB pin is 40mV higher than the set voltage and its average is the peak voltage minus the ripple voltage at VFB pin. s The output voltage is the voltage at the VFB pin minus the voltage drop across the current sensing resistor (I * RSENSE ). s At light loads, the voltage drop across the sensing resistor is small; hence, the output voltage is approximately the voltage at the VFB pin (approximately 40mV higher than the set voltage, VSET). s At heavy loads, larger current flows in the sense resistor, therefore, the voltage drop is higher and the output voltage is lower. This adaptive positioning of the output voltage as the load changes allows a greater output voltage excursion during a fast step-load transient and requires fewer output capacitors to meet the transient-response specification.
Adaptive voltage positioning offset VOFFSET (40mV)
POWER UP and INITIALIZATION At power up, the LX1669 monitors the supply voltage to both the +5V and the +12V pins (there is no special requirement for the sequence of the two supplies). Before both supplies reach their under-voltage lock-out (UVLO) thresholds, the soft-start (SS) pin is held low to prevent soft-start from beginning; the off-time control is disabled and the top MOSFET is kept OFF. After both supplies pass the UVLO thresholds, the circuit begins soft-start. SOFT-START Once the supplies are above the UVLO threshold, the soft-start capacitor begins to be charged up by the set voltage (DAC output) through a 20k internal resistor. The capacitor voltage at the SS pin rises as a simple RC circuit. The SS pin plus a 40mV offset is connected to the error comparator's non-inverting input that controls the output peak voltage. The output voltage will follow the SS pin voltage if sufficient charging current is provided to the output capacitor. The simple RC soft-start allows the output to rise faster at the beginning and slower at the end of the soft-start interval. Thus, the required charging current into the output capacitor is less at the end of the soft-start interval so decreasing the possibility of an over-current. A comparator monitors the SS pin voltage and indicates the end of soft-start when SS pin voltage reaches 95% of VSET. See Application Information section for further details.
Output voltage VOUT (50mV/Div) Steady state voltage at high current is approximately VSET + VOFFSET - IOUT x RSENSE
Nominal set-point voltage, VSET (2.0V) Dynamic voltage tolerance VDYN (100mV for 2s) Initial voltage drop is mainly due to the product of the load current step and ESR of the capacitors. V = I * ESR (ESL effects are ignored)
LOUT = 2.5H, COUT = 6x1500F Sanyo MV-GX, RSENSE = 2.5m
FIGURE 4 -- Adaptive Voltage Positioning
Output current transient step, I = 0 to 14A (5A/Div)
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T H E O R Y O F O P E R AT I O N OVER-CURRENT PROTECTION (OCP) and HICCUP The over-current protection function is tripped when the inductor current exceeds its maximum limit. The current is sensed with a resistor in series with the inductor. When the voltage across the sensing resistor exceeds the 60mV threshold, the OCP comparator outputs a signal to reset the PWM latch and to start hiccup mode. The soft-start capacitor, CSS, is discharged slowly (10 times slower than when being charged up by RSS ). When the voltage on the SS/ENABLE pin reaches a 0.3V threshold, hiccup finishes and the circuit soft-starts again. During hiccup, the top MOSFET is OFF and the bottom MOSFET remains ON. Hiccup is disabled during the soft-start interval, allowing the circuit to start up with the maximum current. If the rise speed of the output voltage is too fast, the required charging current to the output capacitor may be higher than the limit-current. In this case, the peak inductor current is regulated to the limit-current by the current-sense comparator. The top MOSFET is turned on at the end of the controlled off-time and is turned off when the inductor current reaches the limit. If the inductor current still reaches its limit after the soft-start finishes, the hiccup is triggered again. The hiccup ensures the average heat generation on both MOSFET's and the average current to be much less than that in normal operation, if the output has a short circuit. OVER-VOLTAGE PROTECTION (OVP) The output voltage is inherently protected from an over-voltage situation because of the peak-voltage control mechanism. Whenever the VFB pin voltage is higher than the set voltage by 40mV, the top MOSFET is turned off and the bottom MOSFET is turned on. In the case that a fault condition occurs where the OVER-VOLTAGE PROTECTION (OVP)
(continued)
output voltage exceeds the 117% VSET threshold, the OVP comparator will pull up the OVP pin to 2 volts. The OVP pin has a 40mA source current capability, so it can be used to trigger an SCR crowbar or shut off the main power supply. OFF-TIME CONTROL and SWITCHING FREQUENCY An internal timer controls the off-time of the top MOSFET so that the switching frequency is constant at 250kHz under steady-state operation. The timer begins timing once the PWM latch is reset and set the PWM flip-flop again when the off-time finishes. The off-time is controlled to be: TOFF = 4s(1-VOUT /VCC5 ) For a buck converter, the switching frequency is fSW = (1- VOUT /VCC5 )/T OFF Therefore, the switching frequency is nearly constant in steady state operation. During transient loading, the top drive can remain switched on or off until the output voltage is within specification (see Figure 5) in order to reduce transient response time. POWER GOOD OUTPUT An open-collector output, PWRGD, is provided to indicate the status of the output voltages. PWRGD presents high impedance when the switcher output voltage is within 10% of its set voltage. Otherwise, PWRGD presents a low impedance path to ground.
Top FET Drive
Output Voltage (2.8V Set Point) 13A Load Transient (in 390ns)
VIN = 5V, VOUT = 2.8V, LOUT = 5H, COUT = 3 x 1500F, f = 200kHz
FIGURE 5 -- Top FET Drive During Transient Load Conditions
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B I L L O F M AT E R I A L S
Ref
U1 C1 C2 C8 C3 CSS Q1 Q2 RSENSE L1 L2
Description
LX1669 Bill of Materials (Refer to Product Highlight) Part Number / Manufacturer
LX1668 - LinFinity MV-GX Sanyo MV-GX Sanyo
Qty.
1 6 3 2 1 1 1 1 1 1 1 19
Controller IC Capacitor, 1500F, 6.3V, 44m ESR Capacitor, 1500F, 6.3V, 44m ESR Capacitor, 1F, SMD Capacitor, 1F, SMD, 16V Capacitor, 0.1F, SMD MOSFET (low RDS(ON)) MOSFET (low RDS(ON)) Sense Resistor, 2.5m Inductor, 2 - 3H Inductor, 1H
IRL3102/3103, International Rectifier IRL3303/3103, International Rectifier PCB trace HM00-97713 or HM00-98637, BI Technologies
Total Number of Components Optional Components for Over-Voltage Protection and Power Good Signal Q4 R3 SCR Resistor, 10k 2N6504 SMD
1 1
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A P P L I C AT I O N I N F O R M AT I O N
Output Voltage (2.8V Set Point)
Input Ripple Voltage
Input Current
LOUT = 5H, LIN = 0
LOUT = 2.2H, LIN = 0
FIGURE 6 -- Effect Of Different Inductor Values OUTPUT INDUCTOR The output inductor should be selected to meet the requirements of the output voltage ripple in steady-state operation and the inductor current slew-rate during transient. The peak-to-peak output voltage ripple is: VRIPPLE = ESR * IRIPPLE INPUT INDUCTOR where IRIPPLE = (V IN - VOUT ) fSW * L * VOUT VIN In order to supply faster transient load changes, a smaller output inductor is needed. However, reducing the size of the output inductor will result in a higher ripple voltage on the input supply, as shown in Figure 6 above. This noise on the 5V rail can affect other system components, such as graphics cards. It is recommended that a 1 - 1.5H inductor, L2, is used on input to the regulator, to filter the ripple on the 5V supply. Ensure that this inductor has the same current rating as the output inductor. OUTPUT CAPACITOR The output capacitor is sized to meet ripple and transient performance specifications. Effective Series Resistance (ESR) is a critical parameter. When a step load current occurs, the output voltage will have a step that equals the product of the ESR and the current step, I. In an advanced microprocessor power supply, the output capacitor is usually selected for ESR instead of capacitance or RMS current capability. A capacitor that satisfies the ESR requirement usually has a larger capacitance and current capability than strictly needed. The allowed ESR can be found by: ESR * (IRIPPLE + I ) < VEX where IRIPPLE is the inductor ripple current, I is the maximum load current step change, and VEX is the allowed output voltage current applications, such as Pentium and other Socket 7 processors, a 5H inductor is sufficient. The effect of different inductor values is shown in Figure 6 above. Notice how, with a smaller inductor, transient response time is improved, but at the expense of much greater ripple.
IRIPPLE is the inductor ripple current, L is the output inductor value and ESR is the Effective Series Resistance of the output capacitor. IRIPPLE should typically be in the range of 20% to 40% of the maximum output current. Higher inductance results in lower output voltage ripple, allowing slightly higher ESR to satisfy the transient specification. Higher inductance also slows the inductor current slew rate in response to the load-current step change, I, resulting in more output-capacitor voltage droop. The inductor-current rise and fall times are: TRISE = L * I/(VIN - VOUT ) and TFALL = L * I/VOUT When using electrolytic capacitors, the capacitor voltage droop is usually negligible, due to the large capacitance. For higher current applications, such as Pentium II processors, a 2.5H inductor is recommended for the best combination of fast response and manageable ripple voltage. For lower
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A P P L I C AT I O N I N F O R M AT I O N OUTPUT CAPACITOR
(continued)
SOFT-START CAPACITOR
(continued)
excursion in the transient. Adaptive voltage positioning increases the value of VEX, allowing a higher ESR value and reducing the cost of the output capacitor. The positioning voltage is 40mV (peak), using the LX1669, and the transient tolerance is 100mV, resulting in a VEX of 140mV (see Figure 4). Electrolytic capacitors can be used for the output capacitor, but are less stable with age than tantalum capacitors. As they age, their ESR degrades, reducing the system performance and increasing the risk of failure. It is recommended that multiple parallel capacitors be used, so that, as ESR increases with age, overall performance will still meet the processor's requirements. There is frequently strong pressure to use the least expensive components possible, however, this could lead to degraded long-term reliability, especially in the case of filter capacitors. Linfinity's demonstration boards use Sanyo MV-GX filter capacitors, which are aluminum electrolytic, and have demonstrated reliability. The Oscon series from Sanyo generally provides the very best performance in terms of long term ESR stability and general reliability, but at a substantial cost penalty. The MV-GX series provides excellent ESR performance at a reasonable cost. Beware of off-brand, very low-cost filter capacitors, which have been shown to degrade in both ESR and general electrolytic characteristics over time. INPUT CAPACITOR The input capacitor and the input inductor are to filter the pulsating current generated by the buck converter to reduce interference to other circuits connected to the same 5V rail. In addition, the input capacitor provides local de-coupling the buck converter. The capacitor should be rated to handle the RMS current requirement. The RMS current is: IRMS = IL d(1-d) where IL is the inductor current and the d is the duty cycle. The maximum value, when d = 50%, IRMS = 0.5IL. For 5V input and output in the range of 2 to 3V, the required RMS current is very close to 0.5IL. A high-frequency (ceramic) capacitor should be placed across the drain of the top MOSFET and the source of the bottom one to avoid ringing due to the parasitic inductor being switched ON and OFF. See capacitor C7 in the Product Highlight. SOFT-START CAPACITOR The value of the soft-start capacitor determines how fast the output voltage rises and how large the inductor current is required to charge the output capacitor. The output voltage will follow the voltage at SS pin if the required inductor current does not exceed the maximum current in the inductor.
The SS pin voltage can be expressed as: VSS = VSET (1-e-t/RssC ss) where VSET is the output of the DAC. RSS and CSS are soft start resistor and capacitor, as shown in Figure 3. The required inductor current for the output capacitor to follow the SS-pin voltage equals the required capacitor current plus the load current. The soft-start capacitor should be selected so that the overall inductor current does not exceed it maximum. The capacitor current to follow the SS-pin voltage is: ICout = COUT dV dt = COUT CSS * e-(t/RssC ss )
where COUT is the output capacitance. The typical value of CSS should be in the range of 0.1 to 0.2F. During the soft-start interval, before the PWRGD signal becomes valid, the load current from a microprocessor is negligible; therefore, the capacitor current is approximately the required inductor current. CURRENT LIMIT Current limiting occurs when a sensed voltage, proportional to load current, exceeds the current-sense comparator threshold value. The current can be sensed either by using a fixed sense resistor in series with the inductor to cause a voltage drop proportional to current, or by using a resistor and capacitor in parallel with the inductor to sense the voltage drop across the parasitic resistance of the inductor. The LX1669 has a threshold of 60mV.
Sense Resistor The current sense resistor, RSENSE, is selected according to the formula:
RSENSE = VTRIP / ITRIP Where VTRIP is the current sense comparator threshold (60mV) and ITRIP is the desired current limit. Typical choices are shown below. TABLE 2 - Current Sense Resistor Selection Guide
Load Sense Resistor Value
Pentium-Class Processor (<10A) Pentium II Class (>10A)
5m 2.5m
A smaller sense resistor will result in lower heat dissipation (IR) and also a smaller output voltage droop at higher currents.
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S
HEET
A P P L I C AT I O N I N F O R M AT I O N CURRENT LIMIT (continued) There are several alternative types of sense resistor. The surface-mount metal "staple" form of resistor has the advantage of exposure to free air to dissipate heat and its value can be controlled very tightly. Its main drawback, however, is cost. An alternative is to construct the sense resistor using a copper PCB trace. Although the resistance cannot be controlled as tightly, the PCB trace is very low cost.
L
RL
Load
RS Current Sense Comparator
CS VCS RS2
PCB Sense Resistor A PCB sense resistor should be constructed as shown in Figure 7. By attaching directly to the large pads for the capacitor and inductor, heat is dissipated efficiently by the larger copper masses. Connect the current sense lines as shown to avoid any errors.
FIGURE 8 -- Current Sense Circuit The voltage across the capacitor will be equal to the current flowing through the resistor, i.e. VCS = ILRL Since VCS reflects the inductor current, by selecting the appropriate RS and CS, VCS can used to sense current.
2.5m Sense Resistor Inductor
100mil Wide, 850mil Long 2.5mm x 22mm (2 oz/ft2 copper)
Output Capacitor Pad Sense Lines
FIGURE 7 -- Sense Resistor Construction Diagram Recommended sense resistor sizes are given in the following table: TABLE 3 - PCB Sense Resistor Selection Guide
Copper Weight
2 oz/ft2
Design Example (Pentium II circuit, with a maximum static current of 14.2A) The gain of the sensor can be characterized as:
|T(j)|
RL L/RSCS
Copper Desired Resistor Thickness Value
68m 2.5m 5m
Dimensions (w x l) mm inches
2.5 x 22 2.5 x 43 0.1 x 0.85 0.1 x 1.7
1/RSCS
RL/L
FIGURE 9 -- Sensor Gain The dc/static tripping current Itrip,S satisfies: V trip Itrip,S = R L Select L/RSCS RL to have higher dynamic tripping current than the static one. The dynamic tripping current Itrip,d satisfies: Vtrip Itrip,d = L/(R C ) SS
Loss-Less Current Sensing Using Resistance of Inductor Any inductor has a parasitic resistance (RL) which causes a DC voltage drop when current flows through the inductor. Figure 8 shows a sensor circuit comprising of a surface mount resistor, RS, and capacitor, CS, in parallel with the inductor, eliminating the current sense resistor. The current flowing through the inductor is a triangle wave. If the sensor components are selected such that:
L/RL = RS * CS
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Copyright (c) 1999 Rev. 1.0 4/99
PRODUCT DATABOOK 1996/1997
LX1669
PROGRAMMABLE DC:DC CONTROLLER
P
RODUCTION
D
ATA
S
HEET
A P P L I C AT I O N I N F O R M AT I O N CURRENT LIMIT (continued) FET SELECTION (continued) TABLE 4 - FET Selection Guide
This table gives selection of suitable FETs from International Rectifier.
General Guidelines for Selecting RS , CS , and RL V trip RL = Select: RS 10 k Itrip,S Ln CS n = R R and CS according to: LS
The above equation has taken into account the currentdependency of the inductance. Typical values are: RL = 3m, RS = 9k, CS = 0.1F, and L is 2.5H at 0A current. In cases where RL is so large that the trip point current would be lower than the desired short-circuit current limit, a resistor (RS2) can be put in parallel with CS, as shown in Figure 9. The selection of components is as follows:
Device
IRL3803 IRL22203N IRL3103 IRL3102 IRL3303 IRL2703
RDS(ON) @ 10V (m)
6 7 14 13 26 40
ID @ TC = 100C
83 71 40 56 24 17
Max. Breakdown Voltage
30 30 30 20 30 30
All devices in TO-220 package. For surface mount devices (TO-263 / D2-Pak), add 'S' to part number, e.g. IRL3103S.
RL (Required) RS2 = RL (Actual) RS2 + RS
CS =
RS + RS2 L L = * RS2 * RS RL (Actual) * (RS2 // R S ) RL (Actual)
The recommended solution is to use IRL3102 for the high side and IRL3303 for the low side FET, for the best combination of cost and performance. Alternative FET's from any manufacturer could be used, provided they meet the same criteria for RDS(ON).
Again, select (RS2//RS) < 10k. See Application Note AN-7 for more information. OUTPUT ENABLE The LX1669 FET driver outputs are driven to ground by pulling the soft-start pin below 0.5V. PROGRAMMING THE OUTPUT VOLTAGE The output voltage is set by the DAC with a 5-bit digital voltageidentification (VID) code input (see Table 1). The DAC input is designed to be compatible with digital circuits. The VID code may be hard-wired into the package of the processor [as in the case of a Pentium II or Pentium Pro processor]. If the processor does not have a VID code, the output voltage can be set by means of a DIP-switch, jumpers or TTL-compatible digital circuits. When using a DIP-switch or jumpers, connect the VID pin to ground (DIP-switch ON) for a low or "0" signal and leave the VID pin open (DIP-switch OFF) for a high or "1" signal. FET SELECTION To insure reliable operation, the operating junction temperature of the FET switches must be kept below certain limits. The Intel specification states that 115C maximum junction temperature should be maintained with an ambient of 50C. This is achieved by properly derating the part, and by adequate heat sinking. One of the most critical parameters for FET selection is the RDS(ON) resistance. This parameter directly contributes to the power dissipation of the FET devices, and thus impacts heat sink design, mechanical layout, and reliability. In general, the larger the current handling capability of the FET, the lower the RDS(ON) will be, since more die area is available.
Heat Dissipated In Upper MOSFET The heat dissipated in the top MOSFET will be:
PD = (I2 * RDS(ON) * Duty Cycle) + (0.5 * I * VIN * t SW * f S ) Where tSW is switching transition line for body diode (~100ns) and fS is the switching frequency. For the IRL3102 (13m RDS(ON)), converting 5V to 2.0V at 15A will result in typical heat dissipation of 1.92W.
Synchronous Rectification - Lower MOSFET The lower pass element can be either a MOSFET or a Schottky diode. The use of a MOSFET (synchronous rectification) will result in higher efficiency, but at higher cost than using a Schottky diode (non-synchronous). Power dissipated in the bottom MOSFET will be:
PD = I2 * RDS(ON) * [1 - Duty Cycle] = 3.51W
[IRL3303 or 1.76W for the IRL3102]
Non-Synchronous Operation - Schottky Diode A typical Schottky diode with a forward drop of 0.6V will dissipate 0.6 x 15 * (1-2/5) = 5.4W (compared to the 1.8 to 3.5W dissipated by a MOSFET under the same conditions). This power loss becomes much more significant at lower duty cycles - synchronous rectification is recommended. The use of a dual Schottky diode in a single TO-220 package (e.g. the MBR2535) helps improve thermal dissipation.
Copyright (c) 1999 Rev. 1.0 4/99
13
PRODUCT DATABOOK 1996/1997
LX1669
PROGRAMMABLE DC:DC CONTROLLER
P
RODUCTION
D
ATA
S
HEET
A P P L I C AT I O N I N F O R M AT I O N LAYOUT GUIDELINES - THERMAL DESIGN A great deal of time and effort were spent optimizing the thermal design of the demonstration boards. Any user who intends to implement an embedded motherboard would be well advised to carefully read and follow these guidelines. If the FET switches have been carefully selected, external heatsinking is generally not required. However, this means that copper trace on the PC board must now be used. This is a potential trouble spot; as much copper area as possible must be dedicated to heatsinking the FET switches, and the diode as well if a non-synchronous solution is used. In our demonstration board, heatsink area was taken from internal ground and VCC planes which were actually split and connected with VIAS to the power device tabs. The TO-220 and TO-263 cases are well suited for this application, and are the preferred packages. Remember to remove any conformal coating from all exposed PC traces which are involved in heatsinking.
5V Input
LX1669 Output PGND
FIGURE 10 -- Power Traces
General Notes As always, be sure to provide local capacitive decoupling close to the chip. Be sure use ground plane construction for all highfrequency work. Use low ESR capacitors where justified, but be alert for damping and ringing problems. High-frequency designs demand careful routing and layout, and may require several iterations to achieve desired performance levels. Power Traces To reduce power losses due to ohmic resistance, careful consideration should be given to the layout of traces that carry high currents. The main paths to consider are:
s Input power from 5V supply to drain of top MOSFET. s Trace between top MOSFET and lower MOSFET or Schottky diode. s Trace between lower MOSFET or Schottky diode and ground. s Trace between source of top MOSFET and inductor, sense resistor and load. s Current traces on both LDO sections All of these traces should be made as wide and thick as possible, in order to minimize resistance and hence power losses. It is also recommended that, whenever possible, the ground, input and output power signals should be on separate planes (PCB layers). See Figure 10 - bold traces are power traces.
Input Decoupling Capacitors Ensure that capacitors C8 and C3 are placed as close to the IC as possible to minimize the effects of noise on the device. Layout Assistance Please contact Linfinity's Applications Engineers for assistance with any layout or component selection issues. A Gerber file with layout for the most popular devices is available upon request. Evaluation boards are also available upon request. Please check Linfinity's web site for further application notes.
R E L AT E D D E V I C E S
LX1668 Triple Output Regulator (Programmable switching regulator with internal 2.5V LDO plus linear regulator driver)
Pentium is a registered trademark of Intel Corporation.
PRODUCTION DATA - Information contained in this document is proprietary to Lin Finity, and is current as of publication date. This document may not be modified in any way without the express written consent of LinFinity. Product processing does not necessarily include testing of all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
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Copyright (c) 1999 Rev. 1.0 4/99

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